Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

Compared with traditional analog oscilloscope. Digital storage oscilloscopes not only have the advantages of being able to store waveforms, small size, low power consumption, and easy to use, but also have powerful real-time signal processing and analysis functions. In the field of Electronic measurement, digital storage oscilloscopes are gradually replacing analog oscilloscopes. But at present, my country’s use of high-performance digital storage oscilloscopes mainly relies on foreign products, and the price is expensive. Therefore, research on digital storage oscilloscopes has important value. Based on this, a design scheme of a simple digital storage oscilloscope is proposed, which has excellent performance after testing.

l Introduction

Compared with traditional analog oscilloscope. Digital storage oscilloscopes not only have the advantages of being able to store waveforms, small size, low power consumption, and easy to use, but also have powerful real-time signal processing and analysis functions. In the field of electronic measurement, digital storage oscilloscopes are gradually replacing analog oscilloscopes. But at present, my country’s use of high-performance digital storage oscilloscopes mainly relies on foreign products, and the price is expensive. Therefore, research on digital storage oscilloscopes has important value. Based on this, a design scheme of a simple digital storage oscilloscope is proposed, which has excellent performance after testing.

2 Basic working principle of digital storage oscilloscope

The digital storage oscilloscope is different from the analog oscilloscope in that after the signal enters the oscilloscope, the front end of the analog signal is quickly sampled by the high-speed A/D converter, and the digitized signal is stored. And use digital signal processing technology to process the stored data in real time and quickly, get the signal waveform and its parameters, and Display them by the oscilloscope, so as to realize the function of analog oscilloscope, and the measurement accuracy is high. Signals can also be stored, so the digital storage oscilloscope can store and recall signals at specific moments.

3 System analysis and demonstration

3.1 A/D real-time sampling

According to the Nyquist sampling theorem, the sampling rate must be higher than 2 times the highest frequency component of the signal. For a sinusoidal signal, there should be 2 sampling points within a cycle. In order to restore the measured signal without distortion, it is usually necessary to sample more than 8 points in one cycle. In order to cooperate with the high-speed analog-to-digital converter, FPGA is used to control the sampling rate of the M/D converter to realize high-speed real-time sampling. Real-time sampling can achieve full-speed sampling of the entire frequency band. The system design uses ADI’s 12-bit high-speed A/D converter AD9220, and its maximum sampling rate can reach 10 MHz.

3.2 Dual trace Display

The dual-track display module designed in this system uses a high-speed switching analog switch to gate two signals into the sampling circuit, and the two waveforms are stored in the odd and even address bits of the same memory. In dual-track display, the odd address data bits are scanned first, and then the even address data bits are scanned. An analog switch is used instead of an analog-to-digital converter to avoid mutual interference between two high-speed A/D converters, reduce the difficulty of system debugging, and realize system functions.

3.3 Trigger mode

Using FPGA internal software trigger mode, the trigger level is set by software, and the set Schmitt trigger parameters are easy to modify, thereby suppressing the glitch generated by the comparator. When the sample value is greater than the trigger level, a trigger is generated. This method makes full use of FPGA resources, reduces peripheral circuits, eliminates interference caused by hardware glitches, and is easy to adjust the trigger voltage.

3.4 Adjustment of waveform display position

3.4.1 Line scan adjustment

The movement of the waveform is controlled by controlling the offset determination of the start address of the dual-port RAM (1 KB) inside the FPGA. The specific method is to convert the level on the sliding rheostat R into a digital signal through an analog-to-digital converter and transmit it to the FPGA, and then compare it with the initial level digital signal (the level sampling value of the sliding rheostat R when the display position is reset). The offset of the start address ADR0. This method can easily realize the waveform full screen and automatic display function.

3.4.2 Column scan adjustment

MAXl97 samples the Position potentiometer values ​​of channels A and B, and the obtained sampled value is sent to a 16-bit serial D/A converter via FPGA, and MAX542 generates a DC level, which is added to the column scan waveform and sent to an analog oscilloscope for display. The waveform moves up and down. In order to separate channels A and B, FPGA must send the value of the Position A potentiometer to the D/A converter when reading the waveform data of the A channel; and when reading the waveform data of the B channel, the value of the Position B potentiometer must also be sent to D/A converter, so that when a certain potentiometer is adjusted, the waveform of the corresponding channel can be moved up and down.

3.5 Waveform data storage

Digital oscilloscopes can store waveform data using external dual-port RAM or general static RAM. At the same time, FPGA can control the address line of RAM to realize the storage of waveform data. Dual-port RAM can perform read and write operations at the same time. Because this system design uses FPGA, it can make full use of FPGA logic array and embedded array, and dual-port RAM can be written into FPGA, so there is no need to connect RAM, reduce hardware circuit, and improve The reliability of a simple digital oscilloscope.

4 System design scheme

The block diagram of this system design is shown as in Fig. 1. The whole system is based on FPGA as the core, including front-end analog signal processing module, single chip microcomputer module, display module and keyboard input module. The signal pre-processing module includes emitter follower, program-controlled amplifying circuit, and shaping circuit. The signals of A and B channels are changed to 0~4 V by the pre-processing, and AD9220 samples them. The waveform storage control module writes its sampled data into the FPGA internal RAM, and then the waveform display control module displays it. FPGA realizes the functions of frequency measurement, keyboard scanning, display drive, waveform storage control and so on through programming. The single-chip AT89S52 controls the keyboard and dot matrix LCD module of the whole system to realize human-computer interaction. The waveform display mode can be easily adjusted through the panel keys.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

5 Hardware circuit design

5.1 Program-controlled amplifier circuit

The analog switch CD4051, broadband operational amplifier AD844 and precision potentiometer are used to achieve multiple vertical resolutions ranging from 10 mV/div to 2 V/div. FPGA contains a channel selection register module, through the single-chip microcomputer to write the channel number to control the analog switch to gate different feedback resistances, achieve different magnifications, and adjust the signal within the range of 0 to 4 V that meets the AD9220. The specific circuit is shown in Figure 2. Show.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

5.2 Data acquisition module

This system design adopts ADI’s high-speed analog-to-digital converter AD9220 to realize the acquisition of waveform signals. The highest sampling rate of AD9220 can reach 10 MHz, and the external crystal oscillator is 8 MHz. The FPGA realizes waveform storage through sampling. AD9220 has two input modes: DC coupling and AC coupling. This system design adopts direct current coupling, 0~5 V input mode. Use internal 2.5 V reference voltage. Because the vertical resolution of the system only needs 255 grades, the upper 8 bits of AD9220 are used. The data acquisition circuit is shown as in Fig. 3.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

5.3 FPGA design

The system adopts Verilog HDL language, and carries on the description programming of logic circuit to FPGA under QuartusII software, can realize the circuit and control module required by the system flexibly.

5.3.1 Trigger module

The microcontroller writes the set trigger voltage to the FPGA module first, and after comparing within the FPGA, when the sampled value is greater than the trigger voltage, a trigger is generated. Figure 4 shows the trigger module.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

5.3.2 Programmable amplification control module

The one-chip computer samples the signal at the gear position of 100 mv/div at first, compares the channel number of the analog switch closest to the signal, and then writes the control word to generate the corresponding channel number to realize the adjustment of the vertical resolution.

5.3.3 Waveform storage control module

This module is the write address accumulator of the RAM module, which can control the storage of the waveform. H_sering is a single and multiple trigger control pin. When it is high level, it is single trigger and stops writing data to RAM, and the displayed waveform is a stored waveform; when it is low level, it triggers multiple times, and when a trigger is detected When the time, write data to RAM once, a total of l K points, and shield the trigger during the write operation. Write the odd address first, store the sampled waveform data of channel one, and then write the even address, store the sampled waveform data of channel two. If the trigger is not detected multiple times in a row, write all 0s to the RAM and display a straight line, that is, the automatic capture function is realized. The waveform storage control module is shown in Figure 5.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

5.3.4 Waveform display control module

This module is a read address accumulator, reads data from RAM, and generates row scan and column scan data. The base address of the accumulator is written into the single-chip microcomputer, and the start bit of the read data is changed to realize the translation of the waveform. The module can also calculate the peak-to-peak value and average value of the waveform, and the single-chip microcomputer can directly read back the value. The waveform display control module is shown in Figure 6.

6 System software design

The system software is designed to realize the functions of human-computer interaction, information prompt, system startup and reset. First, the system initializes, displays the default channel waveform, and then waits for the button to be pressed. When the key is pressed, the corresponding function is completed, the corresponding waveform is displayed, and then the cycle waits. The system software design process is shown in Figure 7.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

7 Test results

Use self-made digital storage oscilloscope and tektronix TDSl002 digital oscilloscope to measure the input signal, some of the measured data are listed in Table 1.

Design of Simple Digital Storage Oscilloscope Based on Single-chip Microcomputer and FPGA

Through comparison test and result analysis, various input signals can accurately display the waveform on the self-made digital storage oscilloscope, and realize the dual trace display of the waveform, the horizontal and vertical translation of the waveform, the measurement of frequency, average value, and peak-to-peak value. The error is small. Certain accuracy requirements.
8 Conclusion

The system design uses a single-chip microcomputer as the core controller, and makes full use of the programmable logic function of FPGA to complete the relevant circuit design. The organic combination of software and hardware realizes the design of a simple digital storage oscilloscope. The overall system has complete functions, high stability and easy use.

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